The present invention relates to the field of integrated circuits and, in particular, the use of a metal plug structure for contacting doped regions in a periphery transistor of a memory device.
Complex integrated circuits, such as dynamic random access memories (DRAM), have multiple levels of conductors above the surface of a silicon substrate that are used to interconnect various portions of a fabricated circuit.
For DRAM memory devices, the doped regions or active area of a transistor fabricated in a substrate are typically contacted using polysilicon (poly) plugs, which may connect with a capacitor, a bit line, or other conductor layers. Metal plugs would provide better conductivity than poly plugs; however, metal plugs are typically not used to contact the doped regions of a substrate because of processing restraints including the heat sensitivity of a metal plug to later high temperature fabrication processes and possible active area contamination caused by metal diffusing into the active area of the substrate. For instance, in DRAM memory devices, heat cycles are often used to anneal capacitor structures formed after formulation of the substrate contact plugs, which would melt a metal plug and cause the metal to diffuse into the substrate and thereby contaminate the active area and ruin conductivity between the plug and the substrate. Nevertheless, because of its better conductive properties, it would be preferable if at least some of the conductive plugs to the substrate surface were made of metal instead of polysilicon, particularly for peripheral logic transistors where higher speed operations typically occur.
The present invention provides a method and apparatus, which provides an integrated circuit, for example, a DRAM memory device, which utilizes a metal plug structure for contacting doped regions of transistors in the peripheral logic area of the circuitry. The metal plug structure is formed after all high temperature processing steps utilized in wafer fabrication are completed. In particular the invention provides a method for forming metallized contacts to N-channel and P-channel periphery circuit transistor in a memory device by forming the metal plug after a heat cycle process used for capacitor formation and cell poly activation. The metal plugs may be formed prior to forming upper cell plate contacts to the capacitor of a memory device, but subsequent to high temperature processing treatment for the capacitor.